The preferred embodiments relate to electronic measurement and are more specifically directed to devices and methods of calibrating to compensate for non-idealities so as to better measure impedance of a circuit element.
As fundamental in the art, the electrical impedance of an electrical circuit or circuit component is the opposition to current that the circuit or component presents to an applied voltage. In general, impedance is a complex quantity, namely the sum of a resistance and a reactance, and varies with the frequency of the applied voltage. Impedance is of course an important factor in the manufacture of electronic circuits and systems, especially in determining the efficiency with which energy is delivered to the load of a circuit. In addition, impedance measurement and analysis can be used in electronic sensors, for example in determining the properties of a material or workpiece, or conditions of the surrounding environment.
Conventional impedance analyzers operate by applying a sinusoidal stimulus to the object under measurement (referred to herein as the “device under test,” or “DUT”), and measuring the electrical response of the DUT to that sinusoid waveform. Typically, the response is measured at more than one frequency of the sinusoidal stimulus, for example over a “sweep” of input frequencies. The use of a single frequency sinusoid as the measurement stimulus at each of the frequencies of interest greatly simplifies the measurements, as harmonic interference in the response of the DUT is largely avoided.
Many modern electronic integrated circuits integrate essentially all necessary functional components of a computer system, whether general purpose or arranged for a particular end application. Those large scale integrated circuits that include the computational capability for controlling and managing a wide range of functions and useful applications are often referred to as a microcontroller, or in some implementations as a “system on a chip”, or “SoC”, device. Typical modern microcontroller architectures include one or more processor cores that carry out the digital computer functions of retrieving executable instructions from memory, performing arithmetic and logical operations on digital data retrieved from memory, and storing the results of those operations in memory. Other digital, analog, mixed-signal, or even RF functions may also be integrated into the same integrated circuit for acquiring and outputting the data processed by the processor cores.
The efficiencies provided by microcontrollers and SoCs have reduced the cost of implementing complex measurement and computational functions in applications for which such functionality had been cost-prohibitive. For example, sensors and controllers are now being deployed in a wide range of applications and environments, including in the widely-distributed networks of such sensors and controllers often referred to as the “Internet of Things” (IoT). For these reasons, microcontroller-based sensors for the measurement and analysis of electrical impedance is attractive. However, as detailed below, such sensors may be vulnerable to inaccurate measures, for example at higher frequencies and/or with the inclusion of a lower cost operational amplifier as part of the sensor, where such attributes provide non-idealities which therefore can affect measurement performance.
By way of further background, FIG. 1 illustrates a conventional microcontroller-based impedance analyzer 10. In this example, analyzer 10 includes a microcontroller 12, which includes a digital frequency synthesizer 14. Synthesizer 14 generates a sample stream corresponding to a desired signal waveform indicated by signals from a processor 16. In this example, this sample stream corresponds to a sinusoidal waveform of a selected frequency. The sample stream generated by digital frequency synthesizer 14 is applied to a digital-to-analog converter (DAC) 18, which is also realized within microcontroller 12, and that generates the output sinusoidal stimulus Vin that will be applied to a device under test (DUT) 22 for measurement of its impedance. DUT 22 is a two-terminal device, having one terminal receiving stimulus voltage Vin (after additional filtering, if desired), and its other terminal coupled, via a switch 30S1 discussed below, to the inverting input (−) of an operational amplifier (op amp) 24. Op amp 24 receives a reference voltage 26, for example at ½ the peak-to-peak amplitude of stimulus voltage Vin, at its non-inverting input (+). A reference impedance 28 is connected in negative feedback fashion between the output of op amp 24 and its inverting input. The output voltage Vout from op amp 24 is received by microcontroller 12, and converted to the digital domain by an analog-to-digital converter (ADC) 20.
In this conventional inverting amplifier arrangement, the ratio of output voltage Vout to stimulus voltage Vin reflects the impedance of DUT 22, relative to the impedance ZREF of reference impedance 28. Ideally, op amp 24 maintains a virtual ground at its inverting input, and with the ideal expectation that the voltage drop across DUT 22 will equal the input voltage Vin. Additionally and also ideally, assuming the input of op amp 24 exhibits a significantly higher impedance than ZREF of reference impedance 28, effectively all of the current conducted through DUT 22 will pass through reference impedance 28. Output voltage Vout will thus be proportional to this DUT current conducted through reference impedance 28. For example, if the impedance of DUT 22 exactly matches ZREF of reference impedance 28, output voltage Vout will match stimulus voltage Vin (i.e., because the same amount of current through two like impedances will provide the same voltage across each). Accordingly, the impedance of DUT 22 can be determined from the output voltage Vout presented by op amp 24, based on the ratio of voltage Vout relative to voltage Vin. As mentioned above, this measurement is performed over frequency by the conventional architecture of FIG. 1, typically by processor 16 controlling digital frequency synthesizer 14 to sweep the frequency of the stimulus voltage Vin applied to DUT 22. ADC 20 samples and digitizes output voltage Vout representing the response of DUT 22 to the stimulus at each frequency, and processor 16 analyzes that sample stream, for example via a discrete Fourier transform (DFT), to determine the impedance of DUT 22 at each frequency in the sweep. Both the amplitude and phase of output voltage Vout relative to stimulus voltage Vin are considered in quantifying the inductive and capacitive components of the impedance of DUT 22.
As also shown in the conventional arrangement of FIG. 1, DUT 22 is connected, via a first switch 30S1 of a switching block 30, to the inverting input of op amp 24. Switching block 30 includes a second switch 30S2, which is operable to connect a calibration impedance 32 between the input signal Vin and the non-inverting input of op amp 24. Thus, switches 30 are operated to select one of two loads at a time as an input to the non-inverting input of op amp 24, whereby, therefore, in one instance calibration impedance 32 may be so selected, so as to perform a calibration operation given that calibration impedance 32 is a known precision impedance that is useful in calibrating the impedance measurement given a lack of precision of reference impedance 28. Specifically, calibration impedance 32 may be a variable impedance device (e.g., a bank of selectable precision resistors) to provide accurate calibration over a wide range of impedances. Thus, by switch 30S2 selecting the known impedance of ZCAL into the analyzer loop (while DUT 22 is switched out of the loop by switch 30S1), then a ratio is determinable of Vout relative to voltage Vin, which because ZCAL is known can provide a corresponding value of ZREF. Thus, once the reference impedance 28 is estimated from this calibration, thereafter DUT 22 is instead selected as the circuit load (i.e., switch 30S1 is closed, while switch 30S2 is opened), and the result of the calibration can be used to adjust the impedance estimation of DUT 22.
While the above-described conventional architecture is capable of analyzing a wide range of load impedances, the accuracy of those measures is based in considerable part on whether op amp 24 is able to maintain a virtual ground, because under that ideal condition the current remains the same through DUT 22 and reference impedance 28. However, the idealities of the op amp 24, and its ability to maintain a virtual ground, are likely to be affected at higher frequencies, such as beyond 100 KHz. Thus, beyond such frequencies, the ability of some op amps to maintain a virtual ground will diminish, as will the consistency of the idealities that are assumed in the modeling of the circuit that are based on ideal operation. For example, also with increasing frequency, the open loop gain that is typically assumed to be infinite can actually diminish significantly. Other ideal attributes of op amp 24 also can change, such as the infinite or very high input impedance can drop, and the relatively low output impedance can rise. One manner of attempting to address these factors is to implement a more expensive op amp, but such an approach may be cost prohibitive and also may still be somewhat vulnerable to these changes, again therefore diminishing the accuracy of DUT impedance measure that arises from the analyzer 10 which is relying on the op amp.
Given the preceding, while the prior art approaches have served various needs, the present inventor seeks to improve upon the prior art, as further detailed below.